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ezaposleni.singidunum.ac.rs/rest/sciNaucniRezultati/oai:1:4091 2016-05-31T09:34:54Z 1

Checking Correctness of Hardware RNG Architecture Specifications 2016 http://ezaposleni.singidunum.ac.rs/rest/sciNaucniRezultati/oai/record/1/4091 I. Fermevc S. Adamović In this paper we will show one possible implementation of hardware randomness generator. The device in question is based on widely available electronic components comprised of double analogue comparator operating as a free running oscillator and RISC microcontroller used for post processing. Finally, we incorporated an USB interface for communication with the device in order to acquire and evaluate its practical use in cryptography. Data generated by our device conferenceObject 179 182 10.15308/Sinteza-2016-179-182 Sinteza 2016 - International Scientific Conference on ICT and E-Business Related Research